PUBLICATIONS

Conference/Journal/Workshop Publications

2023

(To appear) Trans-FW: Short Circuiting Page Table Walk in Multi-GPU Systems via Remote Forwarding
29th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2023.


(To appear) NeuroPots: Realtime Proactive Defense against Bit-Flip Attacks in Neural Networks
Qi Liu, Jieming Yin, Wujie Wen, Chengmo Yang, Shi Sha
32nd USENIX Security Symposium (USENIX-Security), 2023.


2022

CryptoGCN: Fast and Scalable Homomorphically Encrypted Graph Convolutional Network Inference
Ran Ran, Nuo Xu, Wei Wang, Quan Gang, Jieming Yin, Wujie Wen
36th Conference on Neural Information Processing Systems (NeurIPS), 2022.

Design Challenges of Intra- and Inter- Chiplet Interconnection
Chixiao Chen, Jieming Yin, Yarui Peng, Maurizio Palesi, Wenxu Cao, Letian Huang, Amit Kumar Singh, Haocong Zhi, Xiaohang Wang
IEEE Design & Test, October 2022.


2021

Improving Address Translation in Multi-GPUs via Sharing and Spilling aware TLB Design
Bingyao Li, Jieming Yin, Youtao Zhang, Xulong Tang
54th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2021.

TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation
Liqiang Lu, Naiqing Guan, Yuyue Wang, Liancheng Jia, Zizhang Luo, Jieming Yin, Jason Cong, Yun Liang
48th International Symposium on Computer Architecture (ISCA), 2021.

Distilling Arbitration Logic from Traces using Machine Learning: A Case Study on NoC
Yuan Zhou, Hanyu Wang, Jieming Yin, Zhiru Zhang
58th Annual Design Automation Conference (DAC), 2021.
Best Paper Candidate

Designing a Cost-Effective Cache Replacement Policy using Machine Learning
Subhash Sethumurugan, Jieming Yin, John Sartori
27th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2021.


2020

In-Network Memory Access Ordering for Heterogeneous Multicore Systems
Jieming Yin, Antonia Zhai
14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2020.
Best Paper Award

Kite: A Family of Heterogeneous Interposer Topologies Enabled via Accurate Interconnect Modeling
Srikant Bharadwaj, Jieming Yin, Bradford M. Beckmann, Tushar Krishna
57th Annual Design Automation Conference (DAC), 2020.

Experiences with ML-Driven Design: A NoC Case Study
Jieming Yin, Subhash Sethumurugan, Yasuko Eckert, Alan Smith, Chintan Patel, Eric Morton, Mark Oskin, Natalie Enright Jerger, Gabriel H. Loh
26th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2020.


2019

Northup: Divide-and-Conquer Programming in Systems with Heterogeneous Memories and Processors
Shuai Che, Jieming Yin
33rd IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2019.

An orchestrated NoC prioritization mechanism for heterogeneous CPU-GPU systems
Xiangwei Cai, Jieming Yin, Pingqiang Zhou
Integration, Volume 65, March 2019.


2018

Modular Routing Design for Chiplet-based Systems
Jieming Yin, Zhifeng Lin, Onur Kayiran, Matthew Poremba, Muhammad Shoaib Bin Altaf, Natalie Enright Jerger, Gabriel H. Loh
45th International Symposium on Computer Architecture (ISCA), 2018.
Featured in IEEE Spectrum

Toward More Efficient NoC Arbitration: A Deep Reinforcement Learning Approach
Jieming Yin, Yasuko Eckert, Shuai Che, Mark Oskin, Gabriel H. Loh
The 1st International Workshop on AI-assisted Design for Architecture (AIDArc), 2018.

Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level
Anthony Gutierrez, Bradford Beckmann, Alexandru Dutu, Joseph Gross, John Kalamatianos, Onur Kayiran, Michael LeBeane, Matthew Poremba, Brandon Potter, Sooraj Puthoor, Mark Wyse, Jieming Yin, Akshay Jain, Tim Rogers, Xianwei Zhang, Matt Sinclair
24th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2018.


2017

There and Back Again: Optimizing the Interconnect in Networks of Memory Cubes
Matthew Poremba, Itir Akgun, Jieming Yin, Onur Kayiran, Yuan Xie, Gabriel H. Loh
44th International Symposium on Computer Architecture (ISCA), 2017.


2016

Efficient Synthetic Traffic Models for Large, Complex SoCs
Jieming Yin, Onur Kayiran, Matthew Poremba, Natalie Enright Jerger, Gabriel H. Loh
22nd International Symposium on High Performance Computer Architecture (HPCA), 2016.


2015 and Before

Energy-Efficient Time-Division Multiplexed Hybrid-Switched NoC for Heterogeneous Multicore Systems
Jieming Yin, Pingqiang Zhou, Sachin S. Sapatnekar, Antonia Zhai
28th IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2014.

Energy Efficient Non-Minimal Path On-chip Interconnection Network for Heterogeneous Multicore Systems
Jieming Yin, Pingqiang Zhou, Anup P. Holey, Sachin S. Sapatnekar, Antonia Zhai
The International Symposium on Low Power Electronics and Design (ISLPED), 2012.

NoC Frequency Scaling with Flexible-Pipeline Routers
Pingqiang Zhou, Jieming Yin, Antonia Zhai, Sachin S. Sapatnekar
The International Symposium on Low Power Electronics and Design (ISLPED), 2011.

NoC Design and Performance Optimization
Pingqiang Zhou, Jieming Yin, Antonia Zhai, Sachin S. Sapatnekar
SRC TECHCON, 2011.


Patents

Method and apparatus for masking and transmitting data
Shuai Che, Jieming Yin
US Patent 10,042,774. Granted Aug, 2018.


Setting operating points for circuits in an integrated circuit chip
Wei Huang, Yasuko Eckert, Xudong An, Muhammad Shoaib Bin Altaf, Jieming Yin
US Patent 10,097,091. Granted Oct, 2018.


Using Predictions of Outcomes of Cache Memory Access Requests for Contolling Whether A Request Generator Sends Memory Access Requests To A Memory In Parallel With Cache Memory Access Requests
Jieming Yin, Yasuko Eckert, Matthew Poremba, Steven Raasch, Doug Hunt
US Patent 10,719,441. Granted Jul, 2020.


Mechanism for Dynamic Latency-Bandwidth Trade-off for Efficient Broadcasts/Multicasts
Mohamed Ibrahim, Onur Kayiran, Yasuko Eckert, Jieming Yin
US Patent 10,938,709. Granted Mar, 2021.


Reconfigurable prediction engine for general processor counting
Shuai Che, Jieming Yin
US Patent App 15/922,875. Filed Mar, 2018.


Selecting a precision level for executing a workload in an electronic device
Tony Gutierrez, Sergey Blagodurov, Scott Moe, Xianwei Zhang, Jieming Yin, Matt Sinclair
US Patent App 15/948,795. Filed Apr, 2018.


Architecture for deep Q-learning
Shuai Che, Jieming Yin
US Patent App 16/176,903. Filed Oct, 2018.


Cache management based on reuse distance
Jieming Yin, Subhash Sethumurugan, Yasuko Eckert
US Patent App 16/600,897. Filed Oct, 2019.


Cache line re-reference interval prediction using physical page address
Jieming Yin, Subhash Sethumurugan, Yasuko Eckert
US Patent App 16/716,165. Filed Dec, 2019.


Cache management based on access type priority
Jieming Yin, Subhash Sethumurugan, Yasuko Eckert
US Patent App 16/716,194. Filed Dec, 2019.


Look-ahead teleportation for reliable computing in multi-SIMD quantum processor
Onur Kayiran, Jieming Yin, Yasuko Eckert
US Patent App 16/794,124. Filed Feb, 2020.